index - Equipe Secure and Safe Hardware Accéder directement au contenu

 

Dernières publications

Mots clés

Internet of Things Switches Random access memory Power demand Reverse engineering CRT Neural networks Spin transfer torque Hardware Computational modeling Steadiness FPGA Routing Circuit faults Security and privacy Variance-based Power Attack VPA Tunneling magnetoresistance RSA Resistance 3G mobile communication DRAM AES Countermeasures Fault injection attack Power-constant logic Side-channel attacks Field Programmable Gates Array FPGA Formal methods MRAM Reverse-engineering Intrusion detection Temperature sensors CPA Authentication Image processing Coq Security Security services Sécurité Reliability Simulation Magnetic tunneling Sensors Elliptic curve cryptography Logic gates Magnetic tunnel junction SCA Receivers Information leakage Side-channel attack Electromagnetic Randomness Loop PUF Energy consumption Masking Defect modeling Aging Writing Mutual Information Analysis MIA Filtering Side-channel analysis Differential power analysis DPA Robustness Convolution SoC Countermeasure Training Voltage Signal processing algorithms Estimation Process variation Field programmable gate arrays Lightweight cryptography Transistors Side-channel attacks SCA Costs Masking countermeasure Protocols STT-MRAM Confusion coefficient Linearity Dynamic range Fault injection Side-Channel Analysis SCA Application-specific VLSI designs Formal proof Differential Power Analysis DPA Machine learning FDSOI GSM OCaml Cryptography Asynchronous PUF TRNG Dual-rail with Precharge Logic DPL Side-Channel Attacks Side-Channel Analysis ASIC Hardware security

 

Documents avec texte intégral

211

Références bibliographiques

428

Open access

39 %

Collaborations